As of the end of 1996, the flat panel displays widely used in portable computers are primarily active matrix liquid crystal displays (AMLCDs). AMLCDs, however, are inherently slow with regard to image update rate, and are manufactured using complex processes that suffer from low yields. An alternate flat panel display technology, field emission displays (FEDs), offers reduced manufacturing process complexity with improved brightness and operating speeds. FEDs are based on arrays of field emission tips. They produce light using colored phosphors in much the same way as conventional cathode ray tubes (CRTs). As a result, FEDs do not need the backlights and filters required by AMLCDs.
In principle, an FED is similar to a conventional CRT. In an FED, electrons are liberated from a cathode and strike a phosphor on a transparent faceplate to produce an image. In contrast to a CRT, which has a single electron source (or sometimes three, one for each primary color), each pixel in an FED has its own electron source, a field emission tip. FIG. 1 shows a cross-section of a small portion of an FED 100. As shown, the FED 100 has a substrate or base plate 102, which may be a semiconductor substrate on which circuitry for driving the display has been formed. A conductive cathode layer 104 is formed on top of the substrate. Above the cathode layer are the emitter tips 106 surrounded by insulator material 108. Next there is a patterned conductive gate layer 110 for controlling the emission of electrons by the emitter tips 106. The cathode layer 104 may be patterned into rows and the gate layer patterned into columns so as to form an addressable matrix of emitter tips. The electrons 114 emitted by the tips travel through an evacuated region 112 and strike phosphors (not shown) on the inside surface of a faceplate 116.
The prior art FEDs use microtip emitters made, alternately, from metal, silicon or diamond.
In the prior art, metal microtips have been fabricated using metal evaporation. The evaporation process has limited uniformity over large areas and therefore the use of evaporation has been discontinued in current state-of-the-art CMOS process technologies. The thickness control of the deposited metal is very poor using evaporation. Thus, control of the tip shape is very difficult using evaporation.
In the prior art silicon microtip technology, wet etching of silicon has been used to define the tips. The use of wet etching results in limited resolution capability. The present invention, described below, overcomes these limitations and allows the tip fabrication process to be integrated with advanced CMOS process technologies. The present invention provides significantly improved tip resolution, allowing the formation of a higher density of tips over a given substrate area. Also, the tip radius is reduced significantly, improving the performance of the tips.
It is an object of the present invention to provide an efficient process for producing arrays of field emission tips suitable for use in field emission display devices.